It's not hyperbole to say that Zen saved AMD. The fully redesigned CPU architecture, first launched in 2017, swept away all the company's past mistakes and along with chiplets, Infinity Fabric, and 3D V-cache, it paved the way to profitability and market-leading performance.
Zen 5 also sports"wider pipelines and vectors" but without knowing exactly what AMD is referring to here, it's hard to identify what's precisely changed compared to Zen 4. Traditionally, a wider pipeline means the sequence of logic units that process instructions can handle larger data formats, but in this case, AMD probably means that Zen 5 has more pipelines , more instruction schedulers, and the ability to dispatch more instruction per cycle in each core.
AMD's other statements suggest that this is the case, highlighting that Zen 5 has up to two times more instruction bandwidth in the front end and the same increase between the L1 data cache and the floating point pipelines, as well as between the L2 and L1 caches. AMD's Zen 5 announcement comes across as rather unstated, with just two slides on the core changes, and nothing at all has been said about the Input/Output die.
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Source: pcgamer - 🏆 38. / 67 Read more »